This application claims the benefit of Korean Application No. 2002-3073, filed Jan. 18, 2002, in the Korean Industrial Property Office, the disclosure of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a polycrystalline silicon thin film for a thin film transistor and a display device using the same, and more particularly, to a polycrystalline silicon thin film for a thin film transistor with silicon grains in a crystal growing direction of which is constant and regularized, and a device using the thin film transistor fabricated using the polycrystalline silicon thin film.
2. Description of Related Art
Bonding defects, such as atom dangling bonds existing on the crystal grain boundaries of polycrystalline silicon included in an active channel region, are known to provide traps for electric charge carriers when fabricating a thin film transistor (TFT) substrate using polycrystalline silicon.
Therefore, size, size uniformity, number and position, and direction of the crystal grains not only directly or indirectly exert a fatal influence on TFT characteristics such as threshold voltage (Vth), subthreshold slope, charge carrier mobility, leakage current and device stability, but also exert a fatal influence on uniformity according to positions of the substrate when fabricating an active matrix display substrate using a TFT.
Particularly, uniformity in characteristics between TFTs is fatally influenced by the crystal grain boundaries, as the crystal grains are getting bigger and more regularized in order to improve TFT characteristics.
In the case of fabricating a TFT using polycrystalline silicon crystal grains having a size which is constant in the total or partial region on a TFT substrate or active matrix display, and a growing direction which is constantly regularized for an active channel direction, TFT characteristics might be superior when fabricating a TFT using a dual or multiple active channel having the same active channel length, since the number of crystal grain boundaries fatally influencing movement of the electric charge carrier are reduced as compared to when fabricating a TFT comprising a single active channel.
For example, when fabricating a TFT comprising a single active channel having a length 2L and a width W, using polycrystalline silicon having a crystal grain size Gs and an inclined angle of the fatal crystal grain boundaries xcex8, as illustrated in FIG. 1A, the number of the fatal crystal grain boundaries included in the active channel region is 3, and the total length of the channel is 2L. Conversely, the number of the fatal crystal grain boundaries included in each of the channel regions might be 2 or 1 for a TFT comprising multiple channels (FIG. 1B). Therefore, TFT characteristics will be improved as a whole when the fatal crystal grain boundaries acting as a barrier for movement of the electric charge carriers are decreased.
However, in a TFT fabricated using dual or multiple channels, the number of the fatal crystal grain boundaries included in each of the active channels can be varied depending on positions of the channel, but uniformity of the TFT may be deteriorated accordingly.
For example, as illustrated in FIG. 1B, one fatal crystal grain boundary is included in the first active channel while two fatal crystal grain boundaries are included in the second active channel.
In order to supplement the problems, it is reported in International Patent No. WO 97/45827 that polycrystalline or single crystalline large silicon grains can be formed on a substrate using crystallization technology of sequential lateral solidification (SLS) (FIG. 3), and characteristics which are second to characteristics of a TFT fabricated using single crystalline silicon can be obtained when fabricating a TFT using polycrystalline or single crystalline large silicon grains.
However, the SLS method of fabricating a TFT by forming single crystalline silicon has problems in that TFTs should be accurately aligned in an active channel region at positions where a plurality of TFTs on a substrate are technically difficult to fabricate, and a longer time is required in forming single crystalline silicon having a dimension corresponding to at least the active channel region, compared to when fabricating a TFT substrate using polycrystalline silicon.
A SLS method of fabricating a TFT using polycrystalline silicon is known to be superior to the SLS method of fabricating a TFT by forming single crystalline silicon. This is a reason that when the TFT is fabricated by the SLS using single crystalline silicon, it takes more time to fabricate the TFT than the SLS method of fabricating the TFT using polycrystalline silicon. Accordingly, in the aspect of commercial production, a throughput of the SLS method using single crystalline is decreased.
However, specific characteristics of a TFT using single crystalline silicon can be required in fabricating an active matrix display, such as characteristics requiring a completely built-in driver circuit as well as a circuit requiring a TFT of high characteristics, such as a digital to analog converter (DAC) circuit. When fabricating a TFT using polycrystalline silicon, several fatal crystal grain boundaries can be included in the active channel region according to the size of the crystal grains and the dimension of the active channel, deterioration of TFT characteristics can be predicted, and a completely built-in circuit can be insufficient, accordingly.
On the other hand, as disclosed in U.S. Pat. No. 6,177,301, the barrier effect of the crystal grain boundaries for electric carriers is minimized, as illustrated in FIG. 4A, when a direction of the active channel in fabricating a TFT for liquid crystal display (LCD) devices comprising a driver and pixel array by forming large silicon grains using SLS crystallization technology, is parallel to a direction of crystal grains grown by the SLS crystallization method. Therefore, TFT characteristics which are second to characteristics of single crystalline silicon can be obtained although these characteristics are greatly deteriorated, as illustrated in FIG. 4B, since many crystal grain boundaries acting as traps for electric charge carriers exist where a direction of the active channel is perpendicular to a growing direction of the crystal grains.
There are cases where a TFT inside the driver circuit usually has an angle of 90 when actually fabricating an active matrix display, wherein uniformity of the device can be improved by slantingly fabricating the active matrix display in such a way that a direction of the active channel region is inclined at a growing angle of the crystal grains by an angle of 30 to 60xc2x0 to improve uniformity between TFTs while not greatly deteriorating characteristics of each TFT, as illustrated in FIG. 4C.
However, several fatal crystal grain boundaries are included in the active channel region since the method also uses crystal grains of a limited size formed by the SLS crystallization technology. Therefore, the method is insufficient in built-in circuits requiring TFT characteristics which are equal to that of single crystalline silicon, and does not have accuracy equal to that capable of controlling the number of fatal crystal grain boundaries included in the active channel region. Accordingly, nonuniformity of the TFTs still exists.
Accordingly, it is an object of the present invention to provide a polycrystalline silicon thin film for a TFT capable of securing TFT characteristics by fabricating a TFT using dual or multiple active channels having equal active channel lengths when fabricating a TFT using polycrystalline silicon crystal grains having a size which is constant, and a growing direction which is constant and regularized in a direction of the active channels in the total region or partial region on a TFT substrate or an active matrix display, so that the number of crystal grain boundaries exerting fatal influence on movement of electric charge carriers is reduced, thereby simultaneously improving the TFT characteristics and synchronizing the number of crystal grain boundaries included in each of the channels of dual or multiple channels, and a display device using the polycrystalline silicon thin film for the TFT.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
The foregoing and other objects of the present invention are achieved by providing a polycrystalline silicon thin film for TFTs where a distance xe2x80x9cSxe2x80x9d between active channels of each TFT comprising dual or multiple channels has a relation according to the following Equation:
Equation 1
S=mGsxc2x7sec xcex8xe2x88x92L 
where Gs is a size of crystal grains of the polycrystalline silicon thin film, m is an integer of 1 or more, xcex8 is an inclined angle where fatal crystal grain boundaries, that is, xe2x80x9cprimaryxe2x80x9d crystal grain boundaries are inclined in a direction perpendicular to an active channel direction, and L represents a length of active channels for each TFT comprising dual or multiple channels.
The foregoing and other objects of the present invention may also be achieved by providing a display device fabricated using the polycrystalline silicon thin film for the TFTs.